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Hi! My name is Matthew Kong.

I am a third year Computer Engineering Student at the University of Toronto, interested in interested in RTL design, verification, and physical design for ASICs. A proper website is still under construction, but in the meantime you can check out my projects here!

Github

LinkedIn

matthew.kong@mail.utoronto.ca

Projects

Various projects that I've made, or am currently working on!

RTL/ASIC

DE1-NPU: An FPGA AI Accelerator SoC

March 2026 — A variable dimension (up to 16x16) INT8 Tensor Processing Unit paired with a semi-custom RISC-V CPU wrapper to coordinate matrix loading and visualization. Written in SystemVerilog and C, and runs on the DE1-SoC FPGA.

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MiniTPU: AI Accelerator ASIC

February 2026 — A 4x4 INT6 Tensor Processing Unit ASIC that achieves 133 MMAC/s. Written in SystemVerilog and Verilog-2001, verified with Python cocotb, and designed for SKY130A fabrication with 63% die coverage.

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FPGA Credit Card Validator and Identifier

November 2025 — A hardware implementation of the Luhn Algorithm to identify credit card validity, along with a hardware implementation of binary search on the BIN number to identify credit/debit card details. Runs on the DE1-SoC FPGA.

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PCBs

veryTinyPi — an Raspberry Pi Pico on the tip of your finger

August 2026 — A 14.2mm x 14.4mm Raspberry Pi RP2354A devboard with an 8-pin GPIO header, full USB-C programming support, and 2MB integrated flash. Designed as a 6 layer board, manufactured by JLCPCB.

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FLRTRX Radio Tranceiver — Quadrature Receiver

April 2026 — A quadrature receiver, amplifier, and filter for the FLRTRX Software Defined Radio of ECE295 at UofT.

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LAZARUS-1 Server Backplane PCB

May 2026 → Present — A backplane PCB for a 2U rackmount server, supporting 12 SATA drives, USB-C 10Gbps and PD3.0 at 100W, IPKVM functionality, telemetry, and a touchscreen display using RP2354B MCUs and LicheeRV Nano SBC.

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ePod: A portable ESP32-S3 E-paper high fidelity music player

August 2026 → Present — A portable ESP32-S3 music player that integrates an iPod click wheel, an e-paper display, and a rechargeable 3000mAh battery. It supports Bluetooth 5.3 audio playback, MicroSD card, and configuration over Wi-Fi.

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KC1-FPGA

June 2026 → Present — An FPGA development board that pairs a Lattice iCE40UP5K FPGA with an ESP32-S3-WROOM, with 10/100 Ethernet, an SDXC MicroSD card slot, an I2S microphone, addressable LEDs, and exposed GPIO.

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My Academic Papers

Note: these are academic papers I wrote for the International Baccalaureate programme.

What is the Most Optimal PPT Limit for My CPU?

June 19, 2023 — In this paper, I investigated how my CPU (Ryzen 9 5900X) responded to increased power limits. I tested Forza Horizon 5 and Cinebench R23, analyzing performance, average voltage (VIDs), and temperatures (Tdie).

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Maintaining NVIDIA’s Leadership in The AI Accelerator Market

Mar. 1, 2024 — In this paper, I investigated NVIDIA's performance in the AI accelerator market. I looked at their current position and product portfolio (particularly the H100 GPU), and compared it to competitors, including AMD's MI300X.

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Will Intel's entry into the consumer discrete GPU market be effective in generating long-term profit?

Dec. 21, 2021 — In this paper, I investigated Intel's newly released ARC consumer GPUs and their market performance. I performed cost analyses of individual GPU components (die, memory) and examined their profitability.

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